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The TriCore instruction set supports a number of arithmetic operations on packed data types directly. For example, the following function:. TriCore™ 32-bit TriCore™ V1.6 Instruction Set 32-bit Unified Processor Core User Manual (Volume 2) V1.0, 2012-05 Microcontrollers Edition 2012-05 Published TriCore 1 32-bit Unified Processor Core Volume 2. Instruction Set V1.3 & V1.3.1 Architecture. Microcontrollers. See Also Addendum for TriCore Arch Manual, TriCore™. 32-bit. TriCore™ V1.6. Instruction Set. 32-bit Unified Processor Core. Microcontrollers. User Manual (Volume 2). V1.0, 2012-05 TriCore is a 32-bit microcontroller architecture from Infineon. It unites the elements of a RISC processor core, a microcontroller and a DSP in one chip The TriCore instructions are subdivided into the following categories. See “Instruction Set Highlights” on page 13. s Branch s Arithmetic (Integer, DSP, and TriCore™ 1 DSP Optimization Guide Part 1: Instruction Set, 7.7 MB, 07 Feb 2011. TriCore™ 1 Architecture Overview Handbook, 1.1 MB, 07 Feb 2011.44 TSIM - TriCore Instruction Set Simulator . The TriCore Instruction Set Architecture (ISA) from Infineon is the first single-core 32-bit

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